Does design fit in FPGA ?

Posted on 16th Feb 2014 07:03 pm by admin

Hi all,

I've made a large HCC-Design. Because of the program-size the compile process with the handel-c compiler takesvery long.

Is there any possibility to find out whether the design fits into my FPGA or not, before I start the hcc-compiler?

When I start the compiler (without any optimizations) for simulation purposes inthe DK Design Suite, the output says: NAND-Gates: 38361064 ; FFs: 21824 ;memorybits: 874210 .Does that fit into an Xilinx Virtex 5 (xc5vlx50) ?

Thanks for the help.

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